С выравниванием по байту¶
Для платы HW1-MCp04:
.include "HDL50001_pcf.inc" .alias DM_START 0x00000000 ;start address DM for output by uart0 .alias BLOCK_SIZE 0x00000100 ;end address DM for output by uart0 .alias iterator1 2 .alias byte_DM 5 .alias UART_DATA UART0_DATA .alias UART_BDR UART0_BDR .alias UART_ST UART0_ST .alias UART_CR UART0_CR .alias UART_PORT_PIN 0x300 .alias UART_PORT_BPS GPIOB_BPS .text ;config uart initUART: jmp read_DM getl 0x00000300 wrl @1, UART_PORT_BPS getl 0x00000104 wrl @1, UART_BDR getl 0x00000003 wrl @1, UART_CR setl #iterator1, 0x00000000 complete ; read DM for define address as double word (64 bits) read_DM: getl BLOCK_SIZE subl @1, #iterator1 je @1, stop2 jne @2, out_DM getl #iterator1 addl @1, DM_START rdb @1 setb #byte_DM, @1 addl @4, 0x00000001 setl #iterator1, @1 complete out_DM: getb #byte_DM wrb @1, UART_DATA ; write to tx fifo only one byte jmp buf_TXD complete ; wait for fifo transmitter not full buf_TXD: rdl UART_ST getl 0x00000200 and @1, @2 jne @1, buf_TXD je @2, read_DM complete ; enable led 2,3 stop2: getl 0x1000 complete
Замечание: размер блока памяти данных BLOCK_SIZE не требует выравнивания.
Для платы LDM-MCp04:
.include "HDL50001_pcf.inc" .alias DM_START 0x00000000 ;start address DM for output by uart0 .alias BLOCK_SIZE 0x00000100 ;end address DM for output by uart0 .alias iterator1 2 .alias byte_DM 5 .alias UART_DATA UART3_DATA .alias UART_BDR UART3_BDR .alias UART_ST UART3_ST .alias UART_CR UART3_CR .alias UART_PORT_PIN 0x300 .alias UART_PORT_BPS GPIOD_BPS .text ;config uart initUART: jmp read_DM getl 0x00000300 wrl @1, UART_PORT_BPS getl 0x00000104 wrl @1, UART_BDR getl 0x00000003 wrl @1, UART_CR setl #iterator1, 0x00000000 complete ; read DM for define address as double word (64 bits) read_DM: getl BLOCK_SIZE subl @1, #iterator1 je @1, stop2 jne @2, out_DM getl #iterator1 addl @1, DM_START rdb @1 setb #byte_DM, @1 addl @4, 0x00000001 setl #iterator1, @1 complete out_DM: getb #byte_DM wrb @1, UART_DATA ; write to tx fifo only one byte jmp buf_TXD complete ; wait for fifo transmitter not full buf_TXD: rdl UART_ST getl 0x00000200 and @1, @2 jne @1, buf_TXD je @2, read_DM complete ; enable led 2,3 stop2: getl 0x1000 complete