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  • Multicellular processors

 

SoC

Parameter

Multicellular processor

MCp0411100101,-02,-03

Version

Note

01

02

03

MCU Resolution bit 32/64 32/64 32/64
RAM (dual-port) 128 Kb (4х4Кх64) 128 Kb 128(4х4Кх64) 128 Kb (4х4Кх64)
ROM (Flash) _ 240 Kb (4х10Кх48) 240 Kb (4х10Кх48)
EEPROM _ 16 Kb 16 Kb
Floating point + + +
Processor performance, Mflops 1200 1200 1200
Analog devices:
ADC _ _ 8 ch, 12 bit 1.5 MSPS
DAC _ _ 6 ch, 12 bit 20 ns
Interfaces:
SPI (SPI/ISS) 3 3 3
I2C 2 2 2
UART 4 4 4
PCI _ _ _ in next versions
USB 1 1 1
Ethernet (10/100 Mbit) 1 1 1
PWM 4 4 4
GPIO 80 80 80
CAN _ _ _ in next versions
Supply voltage, V
- core 1,8 1,8 1,8
- periphery 3,3/5 3,3/5 3,3/5
Maximum power consumption, mW:
- core 5 5 5
- periphery 55 160 1500
Software:
Аssembler + + +
Compiler С С С
JTAG Debugger + + +
Loader + + +
Operating system (OS) Linux, Lynx OS-178 Linux, Lynx OS-178 Linux, Lynx OS-178 March, 2012
Timers, capacity 6х32 6х32 6х32
Calendar RTC 1 1 1
Wathdog timer + + +
 Package QFP-144, TQFP-144 QFP-144 QFP-144
Approximate price, $
Commercial (0…+70) 11,8 $ 17,5 $ 55,7 $
Industry (-40…+85) 18,5 $ 22,3 $ 62 $

FPGA

Reference

Description

MCp0402100100

MCp1611100100

Processor 4-cell core MCc0402100000 with ultra-low power consumption and high performance; processor type – with fixed point; digit capacity – 16/32 bits; RAM capacity – 32k x 16; ROM capacity – 4 x 4k 32. Frequency 75MHz, performance (16/32) – 600/300 MIPS at FPGA Spartan-6.


Processor 16-cell core  MCc1601100000  with  maximum performance and  low  power consumption ;
Processor type  – with fixed point;
Digit capacity – 32 bits;
Frequency – 200 MHz;
Performance –  3,2 GFlops at  FPGA; 
Processing speed of internal transfer bus – 25,6 Gbps.
Processors include:
Peripheral devices:
  • UART (asynchronous receiver/transmitter interface)
  • I2C (serial data bus)
  • SPI (serial peripheral interface);
  • PWM (pulse width modulator);
  • RTC (real time clock);
System bus AMBA (Specification 2.0) consists of:
  • AHB (Advanced High-Performance Bus)
  • APB (Advanced Peripheral Bus)
Development software.
Comprehensive set of  development software includes:
  • C-complier;
  • Assembler;
  • Loader;
  • Debug tool based on software model of processor.
Hardware debugging aids –Xilinx standard debug boards are used.
  • Loader –UART sequential port.
  • Multicellular cores

Nomenclature Implementation Description
MCc0401100000 FPGA Processor core, oriented for maximum performance with low power consumption - 4 cells
MCc0801100000 RTL Processor core, oriented for maximum performance with low power consumption - 8 cells
MCc1601100000 RTL Processor core, oriented for maximum performance with low power consumption - 16 cells
MCc0402100000 FPGA Processor core ultra-low power and high performance-4 cells
MCc0802100000 RTL Processor core ultra-low power and high performance-8 cells
MCc1602100000 RTL Processor core ultra-low power and high performance-16 cells
MCc0411100000 FPGA Processor core, oriented for maximum performance with low power consumption - 4 cells, floating point