Multicellular cores

Print PDF
MULTICLET P1
Processor core MULTICLET P1 is oriented at maximum Performance and simultaneous reduction of power consumption; it is designed on the basis of multicellular architecture, which gives the core properties of natural implementation of parallelism and efficient performance of computing process. MULTICLET P1 is fully synthesizable.
Nomenclature Implementation Description
MCc040P1 FPGA 4-cells, 16/32bit, fixed point processor core contains ALU in each cell. Performance of the  core is 4 MIPS/MHz. Calculated value of power consumption on 180nm is 213 umW/MHz.
MCc041P1 SoC 4-cells, 32/64bit FPU processor core contains ALU in each cell. Performance of the core is 24 MFlops/MHz. Power consumption on 180nm is 9 mW/MHz.
MCc042P1 RTL 4-cells, 32/64bit, double precision FPU multicellular processor core contains ALU in each cell. Performance of the  core is 24 MFlops/MHz. Calculated value of power consumption on 180nm is 11 mW/MHz.
MCc080P1 RTL 8-cells, 32bit, fixed point multicellular processor core contains ALU in each cell. Performance of  MCc080P1  is 8 MIPS/MHz. Calculated value of power consumption on 180nm is 450 uW/MHz.
MCc162P1 RTL 16-cells, 64bit, double precision FPU multicellular processor core contains ALU in each cell. Performance of  MCc162P1  is 96 MFlops/MHz. Calculated value of power consumption on 180nm is 52 mW/MHz.
MULTICLET P2
Processor core MULTICLET P2 is oriented at maximum Performance and simultaneous reduction of power consumption; it is designed on the basis of multicellular architecture, which gives the core properties of natural implementation of parallelism and efficient performance of computing process. MULTICLET P2 is fully synthesizable.
Nomenclature Implementation Description
MCc042P2  RTL 4-cells, 32/64bit, double precision FPU multicellular processor core contains ALU in each cell. Performance of the core is 24 MFlops/MHz. Calculated value of power consumption on 180nm is 8 mW/MHz.
MULTICLET С1
Multicellular processor core MULTICLET C1 is oriented at ultra-low power Consumption and simultaneous high performance. It is based on unique multicellular architecture and possesses the ability of natural implementation of parallelism. Architecture of the core reduces power consumption during program processing without the use of specialized standard cell libraries. MULTICLET P2 is fully synthesizable.
Nomenclature Implementation Description
MCc040C1 FPGA 4-cells, 32bit, fixed point processor core contains ALU in each cell. Performance of MCc040C1 procesor core is 3.2 MIPS/MHz. Calculated value of power consumption on 180nm is 170 uW/MHz.
MULTICLET R1
Processor core MULTICLET R1 is based on the  unique multicellular architecture and  provides natural implementation of parallelism. Multicellular architecture possesses the ability of dynamic Reconfiguration by means of which core’s cells can simultaneously solve different tasks. Today only processors based on multicellular architecture possess such ability. MULTICLET R1 is fully synthesizable.
Nomenclature Implementation Description
MCc042R1 RTL 4-cells, 32/64bit, double precision FPU multicellular processor core contains ALU in each cell. Performance of the core is 24 MFlops/MHz. Calculated value of power consumption on 180 nm is 9 mW/MHz.
MCc042R1-1 SoC 4-cell, 32/64bit, double precision FPU multicellular processor core contains ALU in each cell. Performance of the core is 24 MFlops/MHz. Calculated value of power consumption on 180 nm is 9 mW/MHz.
MULTICLET L1
Processor core MULTICLET L1 possesses Liveness ability and is oriented at maximum performance with simultaneous reduction of power consumption. The core is based on the unique multicellular architecture and possesses the attribute of natural implementation of parallelism. Fault tolerance is an inborn attribute of the core and is resulted from core architecture. “Fault tolerance” is an ability to continue program process when 1, 2 or 3 cells fail to perform while the performance is reduced. Consequently, the core posses a system level of fault tolerance as well as scheme level called "Rad-Hard by Design". MULTICLET L1 is fully synthesizable.
Nomenclature Implementation Description
MCc042L1 RTL 4-cells, 32/64bit, double precision FPU processor core contains ALU in each cell. Performance  MCc042L1 is 24 MFlops/MHz. Calculated value of power consumption on 180 nm is 12 mW/MHz.

 



403 Forbidden

403 Forbidden


nginx/1.10.3